1. Field of the Invention
The invention relates, generally, to a circuit arrangement for generating clock pulses in a communications system, more particularly, to a circuit arrangement for a communication system for terminating a plurality of interfaces at a common bus and for generating a synchronization clock for synchronizing the bus.
2. Discussion of Related Art
In ISDN (Integrated Services Digital Network), the connection at the subscriber end, the so-called ISDN basic access, have a number of reference points R, S, T, U which correspond to interfaces.
FIG. 1 shows a model of the ISDN basic access with a connection to an exchange. The U interface forms the line termination both at the subscriber end and at the exchange end.
The exchange have a local line termination 2 (LT) and a digital ISDN exchange termination 1 (ET) which communicate with one another via the V interface.
The ISDN basic access have a network termination 3 (NT) at the subscriber end. The network termination 3 is composed of a first network termination 7 (NT-1), which transfers user information and signaling information to the exchange (physical network termination according to level 1 of the ISO/OSI reference model), and a second network termination 8 (NT-2) which handles concentrating and switching tasks (logical network termination according to level 2 and 3 of the ISO/OSI reference model). The first and second network terminations 7, 8 are connected via the T interface.
A digital ISDN-compatible subscriber terminal 4 (TE1) can be connected directly to the second network termination 8 via the S interface.
To connect an analog subscriber terminal 6 (TE2), a terminal adapter 5 (TA) is necessary which is connected to the second network termination 8. The analog subscriber terminal 6 can then be connected to the terminal adapter 5 via the R interface.
In the ISDN basic access, hierarchical clock synchronization is used: a device configured as master, for example a device executing the top levels of the ISO/OSI reference model, synchronizes a device configured as slave, for example a device executing the lower levels of the ISO/OSI reference model.
In FIG. 1, the exchange 2 is configured as master of the network termination 3 and synchronizes it.
In the case of a multiplicity of slaves which are synchronized by a master, one of these slaves is appointed as reference clock generator for the remaining slaves. In the case of a failure of the reference clock generator, a further slave is appointed as reference clock generator and so forth.
FIG. 2a shows an arrangement in which, at the subscriber end in an ISDN basic access, a number of first network terminations 12 to 14 are connected to a telecommunication system 15 via a common network termination system bus 18. The telecommunication system 15 have the further elements of the ISDN basic access of the subscriber end. A number of subscriber terminals 16 to 17 can be connected to the telecommunication system 15. The first network terminations 12 to 14 are in each case connected to local exchange terminations 9 to 11 via a U interface.
For the hierarchical clock synchronization, the first network terminations 12 to 14 execute tasks of the same level of the ISO/OSI reference model so that one of the first network terminations 12 to 14 or, respectively, one of the corresponding U interfaces must be selected as first reference clock generator for the remaining first network terminations or, respectively, U interfaces. Furthermore, further reference clock generators must be determined which take over the task of the first reference clock generator in the event of its failure. The network termination system bus 18 must be synchronized to the respective reference clock generator.
FIG. 2b shows in detail the clock generation and distribution of various clocks in the arrangement pictured in FIG. 2a. The clocks necessary for operating the arrangement are generated via a phase locked loop 100 and a clock divider 101. To illustrate the direction of synchronization, a line termination 16 (LT) of the network operator, which is responsible for the synchronization, is shown diagrammatically on the right-hand side in FIG. 2b. Furthermore, a network termination with subscriber terminal NT/TE 17 is shown by way of example on the left-hand side.
Each of the first network terminations 12 to 14 have its own 15.36 MHz crystal by means of which, for example, a 512 kHz clock CLS is generated as reference clock. The clock CLS is supplied to the phase locked loop 100 which, in turn, generates from the 512 kHz clock a 15.36 MHz clock XIN, an 8 kHz frame clock FSC and a bit clock DCL which has a frequency of between 512 and 4096 kHz. The frame clock FSC and the bit clock DCL are supplied to each of the first network terminations 12 to 14 and each of the local exchange terminations 9 to 11 via in each case one line. The clock XIN is fed back to the phase locked loop 100 via the clock divider 101 and supplied in parallel to the local exchange terminations 9 to 11 via one line. In this arrangement, the reference clock generator is the 512 kHz clock CLS which is generated in each of the first network terminations 12 to 14.
FIG. 3 shows an arrangement in which a line termination 20 which is not ISDN capable provides subscribers with access to the public ISDN network by means of a digital loop carrier (DLC) system.
For this purpose, a number of first subscriber accesses 35 are combined in a first so-called “D-channel bank” 22 in a digital ISDN exchange termination 19. The basic channels of each basic access are transmitted concentrated to the line termination 20 via a first broadband transmission channel 23.
In the line termination 20, the basic channels of a second “D-channel bank” 24 are distributed to the corresponding subscriber accesses 25 to 32 which are also called line cards in technical language. A number of accesses 25 to 28 are then combined in a third “D-channel bank” 21 to form so-called “central office terminals” and are transmitted via a second broadband transmission channel 33 to a subscriber having a number of network terminations 36 to 37.
The individual accesses 25 to 28 are there distributed to the corresponding network terminations via a fourth “D-channel bank” 34 which forms the so-called remote digital terminal (RDT).
The arrangements shown in FIGS. 2 to 3 can also be used for so-called xDSL (x Digital Subscriber Line) systems such as ADSL, SDSL, VDSL or HDSL. It is only necessary to replace the ISDN transmission method at the U interfaces by the corresponding xDSL transmission method. The basic arrangement shown in FIGS. 2 to 3 will not change.
In the arrangement shown in FIG. 3, similarly to the arrangement shown in FIG. 2, a reference clock generator must be selected and other reference clock generators used as replacement in the event of a failure of the first reference clock generator must be determined for the hierarchical clock synchronization.